39

Eliminating the Timing Penalty of Scan

Year:
2013
Language:
english
File:
PDF, 459 KB
english, 2013
42

Expedited-compact architecture for average scan power reduction

Year:
2013
Language:
english
File:
PDF, 626 KB
english, 2013
48

Regaining Trust in VLSI Design: Design-for-Trust Techniques

Year:
2014
Language:
english
File:
PDF, 3.07 MB
english, 2014